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35 commits

Author SHA1 Message Date
Liam 45c87c7e6e core: refactor emulated cpu core activation 2023-12-04 10:37:16 -05:00
Liam 05bc024260 core: remove remaining uses of dynamic_cast 2023-07-21 19:37:29 -04:00
Liam 8506915208 core: decouple ARM interface from Dynarmic 2023-06-12 22:11:51 -04:00
Liam fb49ec19c1 kernel: use KTypedAddress for addresses 2023-03-22 09:35:16 -04:00
Liam 6523854dd6 kernel: unlayer CPU interrupt handling 2022-07-25 12:14:15 -04:00
Liam 8f8c0b69dc core/arm: better support for backtrace generation 2022-06-25 12:54:24 -04:00
Liam 208ed712f4 core/debugger: memory breakpoint support 2022-06-16 13:18:07 -04:00
Liam 989d4a7a41 core/debugger: Improved stepping mechanism and misc fixes 2022-06-01 02:15:15 -04:00
Liam fb4b3c127f core/debugger: Implement new GDB stub debugger 2022-06-01 00:01:25 -04:00
Merry 91a6df0361 Remove unused PrepareReschedule function 2022-04-24 12:10:16 +01:00
Morph 99ceb03a1c general: Convert source file copyright comments over to SPDX 
This formats all copyright comments according to SPDX formatting guidelines.
Additionally, this resolves the remaining GPLv2 only licensed files by relicensing them to GPLv2.0-or-later.
 2022-04-23 05:55:32 -04:00
Liam 0ca4dff62c core/arm: separate backtrace collection 2022-04-20 21:39:42 -04:00
merry 59cbeb3e1b dynarmic: Fix race when switching page tables 2022-04-10 15:46:29 +01:00
merry a5d040df3d arm_dynarmic: Use HaltReason for svc calls and reschedules 2022-04-03 18:20:11 +01:00
merry f8b8af47ad dynarmic: Better interrupts 2022-04-03 16:39:48 +01:00
Markus Wick d2d7a5060f externals: Update dynarmic. 
The new version supports fastmem on a64.
 2021-05-29 08:53:01 +02:00
Markus Wick 3d2e80daed core/arm_interface: Call SVC after end of dynarmic block. 
So we can modify all of dynarmic states within SVC without ExceptionalExit.

Especially as the ExceptionalExit hack is dropped on upstream dynarmic.
 2021-05-27 23:23:23 +02:00
Markus Wick 993dbe49fc core/arm: Drop ChangeProcessorID. 
This code was used to switch the CPU ID on thread switches.
However since "hle: kernel: multicore: Replace n-JITs impl. with 4 JITs.", the CPU ID is not a constant.
This has been dead code since this rewrite, and dropped in dynarmic as well. So there is no need to keep it.
 2021-05-26 19:48:24 +02:00
Lioncash 9e726a9250 service: Resolve cases of member field shadowing 
Now all that remains is for kernel code to be 'shadow-free' and then
-Wshadow can be turned into an error.
 2021-05-04 04:38:38 -04:00
MerryMage 52dae41d7f arm_dynarmic: Always have a 'valid' jit instance 2021-03-24 18:47:17 +00:00
bunnei 63fd1bb503 core: arm: Implement InvalidateCacheRange for CPU cache invalidation. 2020-11-29 01:31:52 -08:00
bunnei 7b642c7781 hle: kernel: multicore: Replace n-JITs impl. with 4 JITs. 2020-11-29 01:31:51 -08:00
Lioncash fc6db97a09 core: Remove usage of unicorn 
Unicorn long-since lost most of its use, due to dynarmic gaining support
for handling most instructions. At this point any further issues
encountered should be used to make dynarmic better.

This also allows us to remove our dependency on Python.
 2020-11-03 20:22:05 -05:00
bunnei 3d592972dc
Revert "core: Fix clang build" 2020-10-20 19:07:39 -07:00
Lioncash be1954e04c core: Fix clang build 
Recent changes to the build system that made more warnings be flagged as
errors caused building via clang to break.

Fixes #4795
 2020-10-17 19:50:39 -04:00
Fernando Sahmkow 2f8947583f Core/Common: Address Feedback. 2020-06-27 18:20:06 -04:00
Fernando Sahmkow b8df61c642 ARM: Update Dynarmic and Setup A32 according to latest interface. 2020-06-27 11:36:26 -04:00
Fernando Sahmkow f5e32935ca SingleCore: Use Cycle Timing instead of Host Timing. 2020-06-27 11:36:01 -04:00
Fernando Sahmkow 1567824d2d General: Move ARM_Interface into Threads. 2020-06-27 11:35:58 -04:00
Fernando Sahmkow 1b82ccec22 Core: Refactor ARM Interface. 2020-06-27 11:35:56 -04:00
Fernando Sahmkow 25565dffd5 ARM: Addapt to new Exclusive Monitor Interface. 2020-06-27 11:35:50 -04:00
Fernando Sahmkow cd1c38be8d ARM/Memory: Correct Exclusive Monitor and Implement Exclusive Memory Writes. 2020-06-27 11:35:37 -04:00
Fernando Sahmkow e31425df38 General: Recover Prometheus project from harddrive failure 
This commit: Implements CPU Interrupts, Replaces Cycle Timing for Host 
Timing, Reworks the Kernel's Scheduler, Introduce Idle State and 
Suspended State, Recreates the bootmanager, Initializes Multicore 
system.
 2020-06-27 11:35:06 -04:00
bunnei 4caff51710 core: memory: Move to Core::Memory namespace. 
- helpful to disambiguate Kernel::Memory namespace.
 2020-04-17 00:59:28 -04:00
bunnei c083ea7d78 core: Implement separate A32/A64 ARM interfaces. 2020-03-02 21:51:57 -05:00
Renamed from src/core/arm/dynarmic/arm_dynarmic.h (Browse further)