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https://github.com/yuzu-emu/yuzu.git
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VFP: Minor cleanup, functionally the same.
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bunnei
parent
dd21f986b8
commit
b11518c272
1 changed files with 2446 additions and 2557 deletions
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@ -1,22 +1,6 @@
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/*
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vfp/vfpinstr.c - ARM VFPv3 emulation unit - Individual instructions data
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Copyright (C) 2003 Skyeye Develop Group
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for help please send mail to <skyeye-developer@lists.gro.clinux.org>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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// Copyright 2012 Michael Kang, 2015 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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/* Notice: this file should not be compiled as is, and is meant to be
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included in other files only. */
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@ -1227,7 +1211,6 @@ typedef struct _vmovr_inst {
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ARM_INST_PTR INTERPRETER_TRANSLATE(vmovr)(unsigned int inst, int index)
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{
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VFP_DEBUG_TRANSLATE;
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VFP_DEBUG_UNTESTED(VMOVR);
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arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vmovr_inst));
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vmovr_inst *inst_cream = (vmovr_inst *)inst_base->component;
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@ -1308,8 +1291,6 @@ typedef struct _vabs_inst {
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#ifdef VFP_INTERPRETER_TRANS
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ARM_INST_PTR INTERPRETER_TRANSLATE(vabs)(unsigned int inst, int index)
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{
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VFP_DEBUG_TRANSLATE;VFP_DEBUG_UNTESTED(VABS);
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arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vabs_inst));
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vabs_inst *inst_cream = (vabs_inst *)inst_base->component;
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@ -1416,8 +1397,6 @@ typedef struct _vneg_inst {
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#ifdef VFP_INTERPRETER_TRANS
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ARM_INST_PTR INTERPRETER_TRANSLATE(vneg)(unsigned int inst, int index)
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{
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VFP_DEBUG_TRANSLATE;VFP_DEBUG_UNTESTED(VNEG);
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arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(vneg_inst));
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vneg_inst *inst_cream = (vneg_inst *)inst_base->component;
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@ -2942,29 +2921,14 @@ int DYNCOM_TRANS(vstr)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc){
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// bb = arch_check_mm(cpu, bb, Addr, 8, 0, cpu->dyncom_engine->bb_trap);
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//Value* phys_addr;
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if(single){
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#if 0
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phys_addr = get_phys_addr(cpu, bb, Addr, 0);
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bb = cpu->dyncom_engine->bb;
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arch_write_memory(cpu, bb, phys_addr, RSPR(d), 32);
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#endif
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//memory_write(cpu, bb, Addr, RSPR(d), 32);
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memory_write(cpu, bb, Addr, IBITCAST32(FR32(d)), 32);
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bb = cpu->dyncom_engine->bb;
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}
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else{
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#if 0
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phys_addr = get_phys_addr(cpu, bb, Addr, 0);
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bb = cpu->dyncom_engine->bb;
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arch_write_memory(cpu, bb, phys_addr, RSPR(d * 2), 32);
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#endif
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//memory_write(cpu, bb, Addr, RSPR(d * 2), 32);
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memory_write(cpu, bb, Addr, IBITCAST32(FR32(d * 2)), 32);
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bb = cpu->dyncom_engine->bb;
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#if 0
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phys_addr = get_phys_addr(cpu, bb, ADD(Addr, CONST(4)), 0);
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bb = cpu->dyncom_engine->bb;
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arch_write_memory(cpu, bb, phys_addr, RSPR(d * 2 + 1), 32);
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#endif
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//memory_write(cpu, bb, ADD(Addr, CONST(4)), RSPR(d * 2 + 1), 32);
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memory_write(cpu, bb, ADD(Addr, CONST(4)), IBITCAST32(FR32(d * 2 + 1)), 32);
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bb = cpu->dyncom_engine->bb;
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@ -3074,11 +3038,6 @@ int DYNCOM_TRANS(vpush)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc){
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if (single)
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{
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//Memory::Write32(addr, cpu->ExtReg[inst_cream->d+i]);
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#if 0
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phys_addr = get_phys_addr(cpu, bb, Addr, 0);
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bb = cpu->dyncom_engine->bb;
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arch_write_memory(cpu, bb, phys_addr, RSPR(d + i), 32);
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#endif
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//memory_write(cpu, bb, Addr, RSPR(d + i), 32);
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memory_write(cpu, bb, Addr, IBITCAST32(FR32(d + i)), 32);
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bb = cpu->dyncom_engine->bb;
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@ -3087,19 +3046,9 @@ int DYNCOM_TRANS(vpush)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc){
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else
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{
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/* Careful of endianness, little by default */
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#if 0
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phys_addr = get_phys_addr(cpu, bb, Addr, 0);
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bb = cpu->dyncom_engine->bb;
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arch_write_memory(cpu, bb, phys_addr, RSPR((d + i) * 2), 32);
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#endif
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//memory_write(cpu, bb, Addr, RSPR((d + i) * 2), 32);
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memory_write(cpu, bb, Addr, IBITCAST32(FR32((d + i) * 2)), 32);
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bb = cpu->dyncom_engine->bb;
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#if 0
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phys_addr = get_phys_addr(cpu, bb, ADD(Addr, CONST(4)), 0);
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bb = cpu->dyncom_engine->bb;
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arch_write_memory(cpu, bb, phys_addr, RSPR((d + i) * 2 + 1), 32);
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#endif
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//memory_write(cpu, bb, ADD(Addr, CONST(4)), RSPR((d + i) * 2 + 1), 32);
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memory_write(cpu, bb, ADD(Addr, CONST(4)), IBITCAST32(FR32((d + i) * 2 + 1)), 32);
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bb = cpu->dyncom_engine->bb;
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@ -3236,11 +3185,6 @@ int DYNCOM_TRANS(vstm)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc){
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//Memory::Write32(addr, cpu->ExtReg[inst_cream->d+i]);
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/* if R(i) is R15? */
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#if 0
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phys_addr = get_phys_addr(cpu, bb, Addr, 0);
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bb = cpu->dyncom_engine->bb;
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arch_write_memory(cpu, bb, phys_addr, RSPR(d + i), 32);
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#endif
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//memory_write(cpu, bb, Addr, RSPR(d + i), 32);
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memory_write(cpu, bb, Addr, IBITCAST32(FR32(d + i)),32);
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bb = cpu->dyncom_engine->bb;
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@ -3251,21 +3195,11 @@ int DYNCOM_TRANS(vstm)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc){
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{
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//Memory::Write32(addr, cpu->ExtReg[(inst_cream->d+i)*2]);
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#if 0
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phys_addr = get_phys_addr(cpu, bb, Addr, 0);
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bb = cpu->dyncom_engine->bb;
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arch_write_memory(cpu, bb, phys_addr, RSPR((d + i) * 2), 32);
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#endif
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//memory_write(cpu, bb, Addr, RSPR((d + i) * 2), 32);
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memory_write(cpu, bb, Addr, IBITCAST32(FR32((d + i) * 2)),32);
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bb = cpu->dyncom_engine->bb;
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//Memory::Write32(addr + 4, cpu->ExtReg[(inst_cream->d+i)*2 + 1]);
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#if 0
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phys_addr = get_phys_addr(cpu, bb, ADD(Addr, CONST(4)), 0);
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bb = cpu->dyncom_engine->bb;
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arch_write_memory(cpu, bb, phys_addr, RSPR((d + i) * 2 + 1), 32);
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#endif
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//memory_write(cpu, bb, ADD(Addr, CONST(4)), RSPR((d + i) * 2 + 1), 32);
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memory_write(cpu, bb, ADD(Addr, CONST(4)), IBITCAST32(FR32((d + i) * 2 + 1)), 32);
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bb = cpu->dyncom_engine->bb;
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@ -3399,11 +3333,6 @@ int DYNCOM_TRANS(vpop)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc){
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{
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if (single)
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{
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#if 0
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phys_addr = get_phys_addr(cpu, bb, Addr, 1);
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bb = cpu->dyncom_engine->bb;
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val = arch_read_memory(cpu,bb,phys_addr,0,32);
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#endif
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memory_read(cpu, bb, Addr, 0, 32);
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bb = cpu->dyncom_engine->bb;
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val = new LoadInst(cpu->dyncom_engine->read_value, "", false, bb);
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@ -3413,20 +3342,10 @@ int DYNCOM_TRANS(vpop)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc){
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else
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{
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/* Careful of endianness, little by default */
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#if 0
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phys_addr = get_phys_addr(cpu, bb, Addr, 1);
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bb = cpu->dyncom_engine->bb;
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val = arch_read_memory(cpu,bb,phys_addr,0,32);
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#endif
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memory_read(cpu, bb, Addr, 0, 32);
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bb = cpu->dyncom_engine->bb;
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val = new LoadInst(cpu->dyncom_engine->read_value, "", false, bb);
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LETFPS((d + i) * 2, FPBITCAST32(val));
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#if 0
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phys_addr = get_phys_addr(cpu, bb, ADD(Addr, CONST(4)), 1);
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bb = cpu->dyncom_engine->bb;
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val = arch_read_memory(cpu,bb,phys_addr,0,32);
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#endif
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memory_read(cpu, bb, ADD(Addr, CONST(4)), 0, 32);
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bb = cpu->dyncom_engine->bb;
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val = new LoadInst(cpu->dyncom_engine->read_value, "", false, bb);
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@ -3547,11 +3466,6 @@ int DYNCOM_TRANS(vldr)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc){
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//Value* phys_addr;
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Value* val;
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if(single){
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#if 0
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phys_addr = get_phys_addr(cpu, bb, Addr, 1);
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bb = cpu->dyncom_engine->bb;
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val = arch_read_memory(cpu,bb,phys_addr,0,32);
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#endif
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memory_read(cpu, bb, Addr, 0, 32);
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bb = cpu->dyncom_engine->bb;
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val = new LoadInst(cpu->dyncom_engine->read_value, "", false, bb);
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@ -3559,21 +3473,11 @@ int DYNCOM_TRANS(vldr)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc){
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LETFPS(d,FPBITCAST32(val));
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}
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else{
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#if 0
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phys_addr = get_phys_addr(cpu, bb, Addr, 1);
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bb = cpu->dyncom_engine->bb;
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val = arch_read_memory(cpu,bb,phys_addr,0,32);
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#endif
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memory_read(cpu, bb, Addr, 0, 32);
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bb = cpu->dyncom_engine->bb;
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val = new LoadInst(cpu->dyncom_engine->read_value, "", false, bb);
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//LETS(d * 2, val);
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LETFPS(d * 2,FPBITCAST32(val));
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#if 0
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phys_addr = get_phys_addr(cpu, bb, ADD(Addr, CONST(4)), 1);
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bb = cpu->dyncom_engine->bb;
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val = arch_read_memory(cpu,bb,phys_addr,0,32);
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#endif
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memory_read(cpu, bb, ADD(Addr, CONST(4)), 0,32);
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bb = cpu->dyncom_engine->bb;
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val = new LoadInst(cpu->dyncom_engine->read_value, "", false, bb);
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@ -3708,11 +3612,6 @@ int DYNCOM_TRANS(vldm)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc){
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//Memory::Write32(addr, cpu->ExtReg[inst_cream->d+i]);
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/* if R(i) is R15? */
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#if 0
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phys_addr = get_phys_addr(cpu, bb, Addr, 1);
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bb = cpu->dyncom_engine->bb;
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val = arch_read_memory(cpu,bb,phys_addr,0,32);
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#endif
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memory_read(cpu, bb, Addr, 0, 32);
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bb = cpu->dyncom_engine->bb;
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val = new LoadInst(cpu->dyncom_engine->read_value, "", false, bb);
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@ -3723,20 +3622,10 @@ int DYNCOM_TRANS(vldm)(cpu_t *cpu, uint32_t instr, BasicBlock *bb, addr_t pc){
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}
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else
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{
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#if 0
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phys_addr = get_phys_addr(cpu, bb, Addr, 1);
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bb = cpu->dyncom_engine->bb;
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val = arch_read_memory(cpu,bb,phys_addr,0,32);
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#endif
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memory_read(cpu, bb, Addr, 0, 32);
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bb = cpu->dyncom_engine->bb;
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val = new LoadInst(cpu->dyncom_engine->read_value, "", false, bb);
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LETFPS((d + i) * 2, FPBITCAST32(val));
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#if 0
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phys_addr = get_phys_addr(cpu, bb, ADD(Addr, CONST(4)), 1);
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bb = cpu->dyncom_engine->bb;
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val = arch_read_memory(cpu,bb,phys_addr,0,32);
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#endif
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memory_read(cpu, bb, Addr, 0, 32);
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bb = cpu->dyncom_engine->bb;
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val = new LoadInst(cpu->dyncom_engine->read_value, "", false, bb);
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