45 lines
1.5 KiB
Diff
45 lines
1.5 KiB
Diff
commit 3c59a868956636bc8adafb1b168d090897692532
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Author: Rich Felker <dalias@aerifal.cx>
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Date: Wed May 22 15:17:12 2019 -0400
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fix vrregset_t layout and member naming on powerpc64
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the mistaken layout seems to have been adapted from 32-bit powerpc,
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where vscr and vrsave are packed into the same 128-bit slot in a way
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that looks like it relies on non-overlapping-ness of the value bits in
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big endian.
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the powerpc64 port accounted for the fact that the 64-bit ABI puts
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each in its own 128-bit slot, but ordered them incorrectly (matching
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the bit order used on the 32-bit ABI), and failed to account for vscr
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being padded according to endianness so that it can be accessed via
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vector moves.
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in addition to ABI layout, our definition used different logical
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member layout/naming from glibc, where vscr is a structure to
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facilitate access as a 32-bit word or a 128-bit vector. the
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inconsistency here was unintentional, so fix it.
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diff --git a/arch/powerpc64/bits/signal.h b/arch/powerpc64/bits/signal.h
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index 34693a68..94c7a327 100644
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--- arch/powerpc64/bits/signal.h
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+++ arch/powerpc64/bits/signal.h
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@@ -17,10 +17,14 @@ typedef struct {
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typedef struct {
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unsigned __int128 vrregs[32];
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- unsigned _pad[3];
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- unsigned vrsave;
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- unsigned vscr;
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- unsigned _pad2[3];
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+ struct {
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+#if __BIG_ENDIAN__
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+ unsigned _pad[3], vscr_word;
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+#else
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+ unsigned vscr_word, _pad[3];
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+#endif
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+ } vscr;
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+ unsigned vrsave, _pad[3];
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} vrregset_t;
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typedef struct sigcontext {
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