104 lines
4.3 KiB
Diff
104 lines
4.3 KiB
Diff
https://xenbits.xen.org/xsa/advisory-182.html
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From 00593655e231ed5ea20704120037026e33b83fbb Mon Sep 17 00:00:00 2001
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From: Andrew Cooper <andrew.cooper3@citrix.com>
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Date: Mon, 11 Jul 2016 14:32:03 +0100
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Subject: [PATCH] x86/pv: Remove unsafe bits from the mod_l?_entry() fastpath
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All changes in writeability and cacheability must go through full
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re-validation.
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Rework the logic as a whitelist, to make it clearer to follow.
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This is XSA-182
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Reported-by: Jérémie Boutoille <jboutoille@ext.quarkslab.com>
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Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
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Reviewed-by: Tim Deegan <tim@xen.org>
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---
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xen/arch/x86/mm.c | 28 ++++++++++++++++------------
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xen/include/asm-x86/page.h | 1 +
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2 files changed, 17 insertions(+), 12 deletions(-)
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diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
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index dbcf6cb..56ca19f 100644
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--- a/xen/arch/x86/mm.c
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+++ b/xen/arch/x86/mm.c
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@@ -1852,6 +1852,14 @@ static inline int update_intpte(intpte_t *p,
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_t ## e_get_intpte(_o), _t ## e_get_intpte(_n), \
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(_m), (_v), (_ad))
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+/*
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+ * PTE flags that a guest may change without re-validating the PTE.
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+ * All other bits affect translation, caching, or Xen's safety.
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+ */
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+#define FASTPATH_FLAG_WHITELIST \
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+ (_PAGE_NX_BIT | _PAGE_AVAIL_HIGH | _PAGE_AVAIL | _PAGE_GLOBAL | \
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+ _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_USER)
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+
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/* Update the L1 entry at pl1e to new value nl1e. */
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static int mod_l1_entry(l1_pgentry_t *pl1e, l1_pgentry_t nl1e,
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unsigned long gl1mfn, int preserve_ad,
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@@ -1891,9 +1899,8 @@ static int mod_l1_entry(l1_pgentry_t *pl1e, l1_pgentry_t nl1e,
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nl1e = l1e_from_pfn(page_to_mfn(page), l1e_get_flags(nl1e));
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}
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- /* Fast path for identical mapping, r/w, presence, and cachability. */
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- if ( !l1e_has_changed(ol1e, nl1e,
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- PAGE_CACHE_ATTRS | _PAGE_RW | _PAGE_PRESENT) )
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+ /* Fast path for sufficiently-similar mappings. */
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+ if ( !l1e_has_changed(ol1e, nl1e, ~FASTPATH_FLAG_WHITELIST) )
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{
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adjust_guest_l1e(nl1e, pt_dom);
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rc = UPDATE_ENTRY(l1, pl1e, ol1e, nl1e, gl1mfn, pt_vcpu,
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@@ -1970,11 +1977,8 @@ static int mod_l2_entry(l2_pgentry_t *pl2e,
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return -EINVAL;
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}
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- /* Fast path for identical mapping and presence. */
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- if ( !l2e_has_changed(ol2e, nl2e,
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- unlikely(opt_allow_superpage)
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- ? _PAGE_PSE | _PAGE_RW | _PAGE_PRESENT
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- : _PAGE_PRESENT) )
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+ /* Fast path for sufficiently-similar mappings. */
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+ if ( !l2e_has_changed(ol2e, nl2e, ~FASTPATH_FLAG_WHITELIST) )
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{
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adjust_guest_l2e(nl2e, d);
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if ( UPDATE_ENTRY(l2, pl2e, ol2e, nl2e, pfn, vcpu, preserve_ad) )
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@@ -2039,8 +2043,8 @@ static int mod_l3_entry(l3_pgentry_t *pl3e,
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return -EINVAL;
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}
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- /* Fast path for identical mapping and presence. */
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- if ( !l3e_has_changed(ol3e, nl3e, _PAGE_PRESENT) )
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+ /* Fast path for sufficiently-similar mappings. */
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+ if ( !l3e_has_changed(ol3e, nl3e, ~FASTPATH_FLAG_WHITELIST) )
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{
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adjust_guest_l3e(nl3e, d);
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rc = UPDATE_ENTRY(l3, pl3e, ol3e, nl3e, pfn, vcpu, preserve_ad);
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@@ -2103,8 +2107,8 @@ static int mod_l4_entry(l4_pgentry_t *pl4e,
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return -EINVAL;
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}
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- /* Fast path for identical mapping and presence. */
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- if ( !l4e_has_changed(ol4e, nl4e, _PAGE_PRESENT) )
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+ /* Fast path for sufficiently-similar mappings. */
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+ if ( !l4e_has_changed(ol4e, nl4e, ~FASTPATH_FLAG_WHITELIST) )
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{
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adjust_guest_l4e(nl4e, d);
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rc = UPDATE_ENTRY(l4, pl4e, ol4e, nl4e, pfn, vcpu, preserve_ad);
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diff --git a/xen/include/asm-x86/page.h b/xen/include/asm-x86/page.h
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index 224852a..4ae387f 100644
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--- a/xen/include/asm-x86/page.h
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+++ b/xen/include/asm-x86/page.h
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@@ -313,6 +313,7 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t);
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#define _PAGE_AVAIL2 _AC(0x800,U)
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#define _PAGE_AVAIL _AC(0xE00,U)
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#define _PAGE_PSE_PAT _AC(0x1000,U)
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+#define _PAGE_AVAIL_HIGH (_AC(0x7ff, U) << 12)
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#define _PAGE_NX (cpu_has_nx ? _PAGE_NX_BIT : 0)
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/* non-architectural flags */
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#define _PAGE_PAGED 0x2000U
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--
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2.1.4
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