llvm8: fix secureplt patch
[ci skip]
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2 changed files with 143 additions and 23 deletions
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@ -1,10 +1,11 @@
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Partially taken from Adélie Linux, even-more-secure-plt.patch
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Taken from Adélie Linux.
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--- a/lib/Target/PowerPC/PPCSubtarget.cpp
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+++ b/lib/Target/PowerPC/PPCSubtarget.cpp
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--- llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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+++ llvm/lib/Target/PowerPC/PPCSubtarget.cpp
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@@ -138,6 +138,10 @@ void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
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@@ -138,6 +138,10 @@ void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
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if (isDarwin())
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if (isDarwin())
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HasLazyResolverStubs = true;
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HasLazyResolverStubs = true;
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+ // Force SecurePlt for all 32-bit Linux targets
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+ // Force SecurePlt for all 32-bit Linux targets
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+ if (isTargetLinux() && !IsPPC64)
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+ if (isTargetLinux() && !IsPPC64)
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+ SecurePlt = true;
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+ SecurePlt = true;
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@ -12,22 +13,141 @@ Partially taken from Adélie Linux, even-more-secure-plt.patch
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if (HasSPE && IsPPC64)
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if (HasSPE && IsPPC64)
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report_fatal_error( "SPE is only supported for 32-bit targets.\n", false);
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report_fatal_error( "SPE is only supported for 32-bit targets.\n", false);
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if (HasSPE && (HasAltivec || HasQPX || HasVSX || HasFPU))
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if (HasSPE && (HasAltivec || HasQPX || HasVSX || HasFPU))
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--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
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--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
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+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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@@ -218,6 +218,10 @@ static Reloc::Model getEffectiveRelocModel(const Triple &TT,
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@@ -2769,8 +2769,12 @@ SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op,
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if (TT.getArch() == Triple::ppc64)
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SDValue GOTReg = DAG.getRegister(PPC::X2, MVT::i64);
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return Reloc::PIC_;
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GOTPtr = DAG.getNode(PPCISD::ADDIS_GOT_TPREL_HA, dl,
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PtrVT, GOTReg, TGA);
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- } else
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- GOTPtr = DAG.getNode(PPCISD::PPC32_GOT, dl, PtrVT);
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+ } else {
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+ if (isPositionIndependent())
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+ GOTPtr = DAG.getNode(PPCISD::PPC32_PICGOT, dl, PtrVT);
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+ else
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+ GOTPtr = DAG.getNode(PPCISD::PPC32_GOT, dl, PtrVT);
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+ }
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SDValue TPOffset = DAG.getNode(PPCISD::LD_GOT_TPREL_L, dl,
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PtrVT, TGA, GOTPtr);
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return DAG.getNode(PPCISD::ADD_TLS, dl, PtrVT, TPOffset, TGATLS);
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@@ -4941,7 +4945,8 @@ PrepareCall(SelectionDAG &DAG, SDValue &Callee, SDValue &InFlag, SDValue &Chain,
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if (auto *G = dyn_cast<GlobalAddressSDNode>(Callee))
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GV = G->getGlobal();
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bool Local = TM.shouldAssumeDSOLocal(*Mod, GV);
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- bool UsePlt = !Local && Subtarget.isTargetELF() && !isPPC64;
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+ bool UsePlt = !Local && Subtarget.isTargetELF() && !isPPC64 &&
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+ TM.isPositionIndependent();
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+ // We force SecurePlt on 32-bit ppc linux which requires PIC
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if (isFunctionGlobalAddress(Callee)) {
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+ if (TT.isOSLinux() && (TT.getArch() == Triple::ppc))
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GlobalAddressSDNode *G = cast<GlobalAddressSDNode>(Callee);
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+ return Reloc::PIC_;
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--- llvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
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+
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+++ llvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
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// Rest are static by default.
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@@ -62,7 +62,7 @@ define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
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return Reloc::Static;
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; CHECK-NEXT: lfd 4, 328(1)
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; CHECK-NEXT: fmr 1, 31
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; CHECK-NEXT: fmr 2, 30
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-; CHECK-NEXT: bl __gcc_qmul@PLT
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+; CHECK-NEXT: bl __gcc_qmul
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; CHECK-NEXT: lis 3, 16864
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; CHECK-NEXT: stfd 1, 280(1)
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; CHECK-NEXT: fmr 29, 1
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@@ -84,7 +84,7 @@ define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
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; CHECK-NEXT: lfd 4, 360(1)
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; CHECK-NEXT: lfd 1, 352(1)
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; CHECK-NEXT: lfd 2, 344(1)
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-; CHECK-NEXT: bl __gcc_qsub@PLT
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+; CHECK-NEXT: bl __gcc_qsub
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; CHECK-NEXT: mffs 0
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; CHECK-NEXT: mtfsb1 31
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; CHECK-NEXT: lis 3, .LCPI0_1@ha
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@@ -117,7 +117,7 @@ define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
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; CHECK-NEXT: .LBB0_5: # %bb1
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; CHECK-NEXT: li 4, 0
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; CHECK-NEXT: mr 3, 30
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-; CHECK-NEXT: bl __floatditf@PLT
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+; CHECK-NEXT: bl __floatditf
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; CHECK-NEXT: lis 3, 17392
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; CHECK-NEXT: stfd 1, 208(1)
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; CHECK-NEXT: fmr 29, 1
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@@ -140,7 +140,7 @@ define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
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; CHECK-NEXT: lfd 4, 232(1)
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; CHECK-NEXT: lfd 1, 224(1)
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; CHECK-NEXT: lfd 2, 216(1)
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-; CHECK-NEXT: bl __gcc_qadd@PLT
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+; CHECK-NEXT: bl __gcc_qadd
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; CHECK-NEXT: blt 2, .LBB0_7
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; CHECK-NEXT: # %bb.6: # %bb1
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; CHECK-NEXT: fmr 2, 28
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@@ -163,7 +163,7 @@ define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
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; CHECK-NEXT: stw 3, 248(1)
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; CHECK-NEXT: lfd 3, 256(1)
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; CHECK-NEXT: lfd 4, 248(1)
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-; CHECK-NEXT: bl __gcc_qsub@PLT
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+; CHECK-NEXT: bl __gcc_qsub
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; CHECK-NEXT: stfd 2, 176(1)
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; CHECK-NEXT: fcmpu 0, 2, 27
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; CHECK-NEXT: stfd 1, 168(1)
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@@ -205,7 +205,7 @@ define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
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; CHECK-NEXT: lfd 4, 72(1)
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; CHECK-NEXT: lfd 1, 64(1)
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; CHECK-NEXT: lfd 2, 56(1)
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-; CHECK-NEXT: bl __gcc_qsub@PLT
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+; CHECK-NEXT: bl __gcc_qsub
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; CHECK-NEXT: mffs 0
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; CHECK-NEXT: mtfsb1 31
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; CHECK-NEXT: lis 3, .LCPI0_2@ha
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@@ -260,7 +260,7 @@ define i64 @__fixunstfdi(ppc_fp128 %a) nounwind readnone {
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; CHECK-NEXT: lfd 4, 136(1)
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; CHECK-NEXT: lfd 1, 128(1)
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; CHECK-NEXT: lfd 2, 120(1)
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-; CHECK-NEXT: bl __gcc_qsub@PLT
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+; CHECK-NEXT: bl __gcc_qsub
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; CHECK-NEXT: mffs 0
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; CHECK-NEXT: mtfsb1 31
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; CHECK-NEXT: lis 3, .LCPI0_0@ha
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--- llvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll
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+++ llvm/test/CodeGen/PowerPC/2010-02-12-saveCR.ll
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@@ -11,7 +11,7 @@ entry:
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; CHECK-DAG: ori [[T2:[0-9]+]], [[T2]], 34492
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; CHECK-DAG: stwx [[T1]], 1, [[T2]]
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; CHECK-DAG: addi 3, 1, 28
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-; CHECK: bl bar@PLT
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+; CHECK: bl bar
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%x = alloca [100000 x i8] ; <[100000 x i8]*> [#uses=1]
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%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
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%x1 = bitcast [100000 x i8]* %x to i8* ; <i8*> [#uses=1]
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--- llvm/test/CodeGen/PowerPC/available-externally.ll
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+++ llvm/test/CodeGen/PowerPC/available-externally.ll
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@@ -14,7 +14,7 @@ target triple = "powerpc-unknown-linux-gnu"
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define i32 @foo(i64 %x) nounwind {
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entry:
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; STATIC: foo:
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-; STATIC: bl exact_log2@PLT
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+; STATIC: bl exact_log2
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; STATIC: blr
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; PIC: foo:
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--- llvm/test/CodeGen/PowerPC/stubs.ll
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+++ llvm/test/CodeGen/PowerPC/stubs.ll
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@@ -6,4 +6,4 @@ entry:
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}
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}
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--- a/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
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; CHECK: test1:
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+++ b/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
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-; CHECK: bl __floatditf@PLT
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+; CHECK: bl __floatditf
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--- llvm/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll
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+++ llvm/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll
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@@ -72,7 +72,7 @@ define { i128, i8 } @muloti_test(i128 %l, i128 %r) unnamed_addr #0 {
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; PPC32-NEXT: mr 28, 9
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; PPC32-NEXT: mr 23, 6
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; PPC32-NEXT: mr 24, 5
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-; PPC32-NEXT: bl __multi3@PLT
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+; PPC32-NEXT: bl __multi3
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; PPC32-NEXT: mr 7, 4
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; PPC32-NEXT: mullw 4, 24, 30
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; PPC32-NEXT: mullw 8, 29, 23
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--- llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
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+++ llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
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@@ -442,13 +442,22 @@
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@@ -442,13 +442,22 @@
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// On PPC64, VariantKind is VK_None, but on PPC32, it's VK_PLT, and it must
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// On PPC64, VariantKind is VK_None, but on PPC32, it's VK_PLT, and it must
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// come at the _end_ of the expression.
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// come at the _end_ of the expression.
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@ -55,8 +175,8 @@ Partially taken from Adélie Linux, even-more-secure-plt.patch
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}
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}
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/// showRegistersWithPercentPrefix - Check if this register name should be
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/// showRegistersWithPercentPrefix - Check if this register name should be
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--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp
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--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
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+++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp
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+++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
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@@ -487,8 +487,14 @@
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@@ -487,8 +487,14 @@
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if (!Subtarget->isPPC64() && !Subtarget->isDarwin() &&
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if (!Subtarget->isPPC64() && !Subtarget->isDarwin() &&
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isPositionIndependent())
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isPositionIndependent())
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@ -73,8 +193,8 @@ Partially taken from Adélie Linux, even-more-secure-plt.patch
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const MachineOperand &MO = MI->getOperand(2);
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const MachineOperand &MO = MI->getOperand(2);
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const GlobalValue *GValue = MO.getGlobal();
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const GlobalValue *GValue = MO.getGlobal();
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MCSymbol *MOSymbol = getSymbol(GValue);
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MCSymbol *MOSymbol = getSymbol(GValue);
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--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
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--- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
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+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
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+++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
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@@ -4054,7 +4054,20 @@
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@@ -4054,7 +4054,20 @@
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if (trySETCC(N))
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if (trySETCC(N))
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return;
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return;
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@ -1,7 +1,7 @@
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# Template file for 'llvm8'
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# Template file for 'llvm8'
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pkgname=llvm8
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pkgname=llvm8
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version=8.0.1
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version=8.0.1
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revision=1
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revision=2
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wrksrc="llvm-${version}.src"
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wrksrc="llvm-${version}.src"
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build_style=cmake
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build_style=cmake
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configure_args="
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configure_args="
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