libglvnd: fix build system ppc64 checking, use asm on ppc64 BE
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4 changed files with 94 additions and 1 deletions
51
srcpkgs/libglvnd/patches/001-fix-ppc64le-asm.patch
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51
srcpkgs/libglvnd/patches/001-fix-ppc64le-asm.patch
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@ -0,0 +1,51 @@
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From 5ffb8df0ae243f611a0752950443e7a9877e502c Mon Sep 17 00:00:00 2001
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From: Kyle Brenneman <kbrenneman@nvidia.com>
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Date: Fri, 6 Dec 2019 07:27:54 -0700
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Subject: [PATCH] meson: Fix the PPC64 build.
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Check for a cpu_family value of 'ppc64', not 'ppc'. 'ppc' is for 32-bit power.
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In GLdispatch, fix the file list for the PPC64 entrypoints.
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---
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meson.build | 4 ++--
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src/GLdispatch/vnd-glapi/meson.build | 4 ++--
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2 files changed, 4 insertions(+), 4 deletions(-)
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diff --git a/meson.build b/meson.build
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index 44c7172..602e837 100644
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--- meson.build
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+++ meson.build
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@@ -55,7 +55,7 @@ if not with_asm.disabled()
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add_project_arguments('-DUSE_ARMV7_ASM', language : 'c')
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elif host_machine.cpu_family() == 'aarch64'
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add_project_arguments('-DUSE_AARCH64_ASM', language : 'c')
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- elif host_machine.cpu_family() == 'ppc' and host_machine.endian() == 'little'
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+ elif host_machine.cpu_family() == 'ppc64' and host_machine.endian() == 'little'
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add_project_arguments('-DUSE_PPC64LE_ASM', language : 'c')
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elif with_asm.enabled()
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error('No ASM available for @0@ (@1@ endian)'.format(host_machine.system(), host_machine.endian()))
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@@ -118,7 +118,7 @@ if use_asm
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elif host_machine.cpu_family() == 'aarch64'
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gl_dispatch_type = 'aarch64_tsd'
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elif host_machine.cpu_family() == 'ppc64' and host_machine.endian() == 'little'
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- gl_dispatch_type = 'ppc64le_@1@'.format(have_tls ? 'tls' : 'tsd')
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+ gl_dispatch_type = 'ppc64le_@0@'.format(have_tls ? 'tls' : 'tsd')
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endif
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endif
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add_project_arguments('-DGLDISPATCH_TYPE_@0@'.format(gl_dispatch_type.to_upper()), language : ['c'])
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diff --git a/src/GLdispatch/vnd-glapi/meson.build b/src/GLdispatch/vnd-glapi/meson.build
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index ce20178..200d476 100644
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--- src/GLdispatch/vnd-glapi/meson.build
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+++ src/GLdispatch/vnd-glapi/meson.build
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@@ -55,9 +55,9 @@ else
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elif gl_dispatch_type == 'aarch64_tsd'
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_entry_files += 'entry_aarch64_tsd.c'
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elif gl_dispatch_type == 'ppc64le_tls'
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- _entry_files += 'entry_aarch64_tls.c'
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+ _entry_files += 'entry_ppc64le_tls.c'
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elif gl_dispatch_type == 'ppc64le_tsd'
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- _entry_files += 'entry_aarch64_tsd.c'
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+ _entry_files += 'entry_ppc64le_tsd.c'
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else
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error('No matching ASM file for @0@'.format(gl_dispatch_type))
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endif
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24
srcpkgs/libglvnd/patches/002-use-asm-ppc64-be.patch
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24
srcpkgs/libglvnd/patches/002-use-asm-ppc64-be.patch
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@ -0,0 +1,24 @@
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While these assembly files are named ppc64le, they're really just assembly
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for the modern ELFv2 ABI, which Void uses even on big endian. So enable those
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instead of the generic C stuff.
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--- meson.build
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+++ meson.build
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@@ -55,7 +55,7 @@ if not with_asm.disabled()
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add_project_arguments('-DUSE_ARMV7_ASM', language : 'c')
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elif host_machine.cpu_family() == 'aarch64'
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add_project_arguments('-DUSE_AARCH64_ASM', language : 'c')
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- elif host_machine.cpu_family() == 'ppc64' and host_machine.endian() == 'little'
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+ elif host_machine.cpu_family() == 'ppc64'
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add_project_arguments('-DUSE_PPC64LE_ASM', language : 'c')
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elif with_asm.enabled()
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error('No ASM available for @0@ (@1@ endian)'.format(host_machine.system(), host_machine.endian()))
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@@ -117,7 +117,7 @@ if use_asm
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gl_dispatch_type = 'armv7_tsd'
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elif host_machine.cpu_family() == 'aarch64'
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gl_dispatch_type = 'aarch64_tsd'
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- elif host_machine.cpu_family() == 'ppc64' and host_machine.endian() == 'little'
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+ elif host_machine.cpu_family() == 'ppc64'
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gl_dispatch_type = 'ppc64le_@0@'.format(have_tls ? 'tls' : 'tsd')
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endif
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endif
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17
srcpkgs/libglvnd/patches/003-fix-tests-be.patch
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srcpkgs/libglvnd/patches/003-fix-tests-be.patch
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This change fixes the test suite on big endian ppc64 systems by using correct
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word instructions on an `int *` rather than doubleword ones.
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--- tests/dummy/patchentrypoints.c
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+++ tests/dummy/patchentrypoints.c
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@@ -176,9 +176,9 @@ static void patch_ppc64(char *writeEntry, const char *execEntry,
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// 1000:
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0x7D2903A6, // mtctr 9
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0xE96C0020, // ld 11, 9000f-1000b(12)
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- 0xE92B0000, // ld 9, 0(11)
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+ 0x812B0000, // lwz 9, 0(11)
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0x39290001, // addi 9, 9, 1
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- 0xF92B0000, // std 9, 0(11)
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+ 0x912B0000, // stw 9, 0(11)
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0x7D2902A6, // mfctr 9
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0x4E800020, // blr
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0x60000000, // nop
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@ -22,7 +22,8 @@ if [ "$XBPS_TARGET_LIBC" = "musl" ]; then
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fi
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case "$XBPS_TARGET_MACHINE" in
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arm*|mips*) configure_args+=" -Dasm=disabled";;
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ppc64*) ;;
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arm*|mips*|ppc*) configure_args+=" -Dasm=disabled";;
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esac
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post_install() {
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