libglvnd: fix build system ppc64 checking, use asm on ppc64 BE

srcpkgs/libglvnd/patches/001-fix-ppc64le-asm.patch

@@ -0,0 +1,51 @@
+From 5ffb8df0ae243f611a0752950443e7a9877e502c Mon Sep 17 00:00:00 2001
+From: Kyle Brenneman <kbrenneman@nvidia.com>
+Date: Fri, 6 Dec 2019 07:27:54 -0700
+Subject: [PATCH] meson: Fix the PPC64 build.
+
+Check for a cpu_family value of 'ppc64', not 'ppc'. 'ppc' is for 32-bit power.
+
+In GLdispatch, fix the file list for the PPC64 entrypoints.
+---
+ meson.build                          | 4 ++--
+ src/GLdispatch/vnd-glapi/meson.build | 4 ++--
+ 2 files changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/meson.build b/meson.build
+index 44c7172..602e837 100644
+--- meson.build
++++ meson.build
+@@ -55,7 +55,7 @@ if not with_asm.disabled()
+     add_project_arguments('-DUSE_ARMV7_ASM', language : 'c')
+   elif host_machine.cpu_family() == 'aarch64'
+     add_project_arguments('-DUSE_AARCH64_ASM', language : 'c')
+-  elif host_machine.cpu_family() == 'ppc' and host_machine.endian() == 'little'
++  elif host_machine.cpu_family() == 'ppc64' and host_machine.endian() == 'little'
+     add_project_arguments('-DUSE_PPC64LE_ASM', language : 'c')
+   elif with_asm.enabled()
+     error('No ASM available for @0@ (@1@ endian)'.format(host_machine.system(), host_machine.endian()))
+@@ -118,7 +118,7 @@ if use_asm
+   elif host_machine.cpu_family() == 'aarch64'
+     gl_dispatch_type = 'aarch64_tsd'
+   elif host_machine.cpu_family() == 'ppc64' and host_machine.endian() == 'little'
+-    gl_dispatch_type = 'ppc64le_@1@'.format(have_tls ? 'tls' : 'tsd')
++    gl_dispatch_type = 'ppc64le_@0@'.format(have_tls ? 'tls' : 'tsd')
+   endif
+ endif
+ add_project_arguments('-DGLDISPATCH_TYPE_@0@'.format(gl_dispatch_type.to_upper()), language : ['c'])
+diff --git a/src/GLdispatch/vnd-glapi/meson.build b/src/GLdispatch/vnd-glapi/meson.build
+index ce20178..200d476 100644
+--- src/GLdispatch/vnd-glapi/meson.build
++++ src/GLdispatch/vnd-glapi/meson.build
+@@ -55,9 +55,9 @@ else
+   elif gl_dispatch_type == 'aarch64_tsd'
+     _entry_files += 'entry_aarch64_tsd.c'
+   elif gl_dispatch_type == 'ppc64le_tls'
+-    _entry_files += 'entry_aarch64_tls.c'
++    _entry_files += 'entry_ppc64le_tls.c'
+   elif gl_dispatch_type == 'ppc64le_tsd'
+-    _entry_files += 'entry_aarch64_tsd.c'
++    _entry_files += 'entry_ppc64le_tsd.c'
+   else
+     error('No matching ASM file for @0@'.format(gl_dispatch_type))
+   endif

srcpkgs/libglvnd/patches/002-use-asm-ppc64-be.patch

@@ -0,0 +1,24 @@
+While these assembly files are named ppc64le, they're really just assembly
+for the modern ELFv2 ABI, which Void uses even on big endian. So enable those
+instead of the generic C stuff.
+
+--- meson.build
++++ meson.build
+@@ -55,7 +55,7 @@ if not with_asm.disabled()
+     add_project_arguments('-DUSE_ARMV7_ASM', language : 'c')
+   elif host_machine.cpu_family() == 'aarch64'
+     add_project_arguments('-DUSE_AARCH64_ASM', language : 'c')
+-  elif host_machine.cpu_family() == 'ppc64' and host_machine.endian() == 'little'
++  elif host_machine.cpu_family() == 'ppc64'
+     add_project_arguments('-DUSE_PPC64LE_ASM', language : 'c')
+   elif with_asm.enabled()
+     error('No ASM available for @0@ (@1@ endian)'.format(host_machine.system(), host_machine.endian()))
+@@ -117,7 +117,7 @@ if use_asm
+     gl_dispatch_type = 'armv7_tsd'
+   elif host_machine.cpu_family() == 'aarch64'
+     gl_dispatch_type = 'aarch64_tsd'
+-  elif host_machine.cpu_family() == 'ppc64' and host_machine.endian() == 'little'
++  elif host_machine.cpu_family() == 'ppc64'
+     gl_dispatch_type = 'ppc64le_@0@'.format(have_tls ? 'tls' : 'tsd')
+   endif
+ endif

srcpkgs/libglvnd/patches/003-fix-tests-be.patch

@@ -0,0 +1,17 @@
+This change fixes the test suite on big endian ppc64 systems by using correct
+word instructions on an `int *` rather than doubleword ones.
+
+--- tests/dummy/patchentrypoints.c
++++ tests/dummy/patchentrypoints.c
+@@ -176,9 +176,9 @@ static void patch_ppc64(char *writeEntry, const char *execEntry,
+         // 1000:
+         0x7D2903A6,     //  mtctr 9
+         0xE96C0020,     //  ld    11, 9000f-1000b(12)
+-        0xE92B0000,     //  ld    9, 0(11)
++        0x812B0000,     //  lwz   9, 0(11)
+         0x39290001,     //  addi  9, 9, 1
+-        0xF92B0000,     //  std   9, 0(11)
++        0x912B0000,     //  stw   9, 0(11)
+         0x7D2902A6,     //  mfctr 9
+         0x4E800020,     //  blr
+         0x60000000,     //  nop

srcpkgs/libglvnd/template

@@ -22,7 +22,8 @@ if [ "$XBPS_TARGET_LIBC" = "musl" ]; then
 fi
 
 case "$XBPS_TARGET_MACHINE" in
-	arm*|mips*) configure_args+=" -Dasm=disabled";;
+	ppc64*) ;;
+	arm*|mips*|ppc*) configure_args+=" -Dasm=disabled";;
 esac
 
 post_install() {