llvm: add patch to fix rendering errors AMDGPU
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Enno Boland
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2 changed files with 144 additions and 1 deletions
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From 25e2616626caafb896517e18cd8aa724fba2b200 Mon Sep 17 00:00:00 2001
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From: Tom Stellard <thomas.stellard@amd.com>
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Date: Tue, 29 Nov 2016 03:41:28 +0000
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Subject: [PATCH] Merging r280589:
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------------------------------------------------------------------------
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r280589 | nhaehnle | 2016-09-03 05:26:32 -0700 (Sat, 03 Sep 2016) | 19 lines
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AMDGPU: Fix an interaction between WQM and polygon stippling
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Summary:
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This fixes a rare bug in polygon stippling with non-monolithic pixel shaders.
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The underlying problem is as follows: the prolog part contains the polygon
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stippling sequence, i.e. a kill. The main part then enables WQM based on the
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_reduced_ exec mask, effectively undoing most of the polygon stippling.
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Since we cannot know whether polygon stippling will be used, the main part
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of a non-monolithic shader must always return to exact mode to fix this
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problem.
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Reviewers: arsenm, tstellarAMD, mareko
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Subscribers: arsenm, llvm-commits, kzhuravl
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Differential Revision: https://reviews.llvm.org/D23131
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------------------------------------------------------------------------
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_39@288105 91177308-0d34-0410-b5e6-96231b3b80d8
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---
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lib/Target/AMDGPU/SIInstructions.td | 1 +
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lib/Target/AMDGPU/SIWholeQuadMode.cpp | 7 -----
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test/CodeGen/AMDGPU/wqm.ll | 49 ++++++++++++++++++++++++++++++++---
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3 files changed, 46 insertions(+), 11 deletions(-)
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diff --git a/lib/Target/AMDGPU/SIInstructions.td b/lib/Target/AMDGPU/SIInstructions.td
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index 18b7d5d..dde5f2f 100644
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--- a/lib/Target/AMDGPU/SIInstructions.td
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+++ b/lib/Target/AMDGPU/SIInstructions.td
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@@ -2029,6 +2029,7 @@ def SI_RETURN : PseudoInstSI <
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let hasSideEffects = 1;
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let SALU = 1;
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let hasNoSchedulingInfo = 1;
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+ let DisableWQM = 1;
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}
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let Uses = [EXEC], Defs = [EXEC, VCC, M0],
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diff --git a/lib/Target/AMDGPU/SIWholeQuadMode.cpp b/lib/Target/AMDGPU/SIWholeQuadMode.cpp
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index b200c15..1534d58 100644
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--- a/lib/Target/AMDGPU/SIWholeQuadMode.cpp
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+++ b/lib/Target/AMDGPU/SIWholeQuadMode.cpp
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@@ -219,13 +219,6 @@ char SIWholeQuadMode::scanInstructions(MachineFunction &MF,
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markInstruction(MI, Flags, Worklist);
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GlobalFlags |= Flags;
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}
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-
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- if (WQMOutputs && MBB.succ_empty()) {
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- // This is a prolog shader. Make sure we go back to exact mode at the end.
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- Blocks[&MBB].OutNeeds = StateExact;
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- Worklist.push_back(&MBB);
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- GlobalFlags |= StateExact;
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- }
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}
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return GlobalFlags;
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diff --git a/test/CodeGen/AMDGPU/wqm.ll b/test/CodeGen/AMDGPU/wqm.ll
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index 809a7ba..41e4264 100644
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--- a/test/CodeGen/AMDGPU/wqm.ll
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+++ b/test/CodeGen/AMDGPU/wqm.ll
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@@ -17,17 +17,18 @@ main_body:
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;CHECK-LABEL: {{^}}test2:
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;CHECK-NEXT: ; %main_body
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;CHECK-NEXT: s_wqm_b64 exec, exec
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-;CHECK: image_sample
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;CHECK-NOT: exec
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-;CHECK: _load_dword v0,
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-define amdgpu_ps float @test2(<8 x i32> inreg %rsrc, <4 x i32> inreg %sampler, float addrspace(1)* inreg %ptr, <4 x i32> %c) {
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+define amdgpu_ps void @test2(<8 x i32> inreg %rsrc, <4 x i32> inreg %sampler, float addrspace(1)* inreg %ptr, <4 x i32> %c) {
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main_body:
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%c.1 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %c, <8 x i32> %rsrc, <4 x i32> %sampler, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%c.2 = bitcast <4 x float> %c.1 to <4 x i32>
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%c.3 = extractelement <4 x i32> %c.2, i32 0
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%gep = getelementptr float, float addrspace(1)* %ptr, i32 %c.3
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%data = load float, float addrspace(1)* %gep
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- ret float %data
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+
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+ call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %data, float undef, float undef, float undef)
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+
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+ ret void
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}
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; ... but disabled for stores (and, in this simple case, not re-enabled).
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@@ -414,6 +415,46 @@ entry:
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ret void
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}
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+; Must return to exact at the end of a non-void returning shader,
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+; otherwise the EXEC mask exported by the epilog will be wrong. This is true
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+; even if the shader has no kills, because a kill could have happened in a
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+; previous shader fragment.
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+;
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+; CHECK-LABEL: {{^}}test_nonvoid_return:
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+; CHECK: s_mov_b64 [[LIVE:s\[[0-9]+:[0-9]+\]]], exec
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+; CHECK: s_wqm_b64 exec, exec
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+;
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+; CHECK: s_and_b64 exec, exec, [[LIVE]]
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+; CHECK-NOT: exec
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+define amdgpu_ps <4 x float> @test_nonvoid_return() nounwind {
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+ %tex = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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+ %tex.i = bitcast <4 x float> %tex to <4 x i32>
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+ %dtex = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %tex.i, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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+ ret <4 x float> %dtex
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+}
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+
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+; CHECK-LABEL: {{^}}test_nonvoid_return_unreachable:
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+; CHECK: s_mov_b64 [[LIVE:s\[[0-9]+:[0-9]+\]]], exec
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+; CHECK: s_wqm_b64 exec, exec
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+;
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+; CHECK: s_and_b64 exec, exec, [[LIVE]]
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+; CHECK-NOT: exec
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+define amdgpu_ps <4 x float> @test_nonvoid_return_unreachable(i32 inreg %c) nounwind {
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+entry:
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+ %tex = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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+ %tex.i = bitcast <4 x float> %tex to <4 x i32>
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+ %dtex = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %tex.i, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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+
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+ %cc = icmp sgt i32 %c, 0
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+ br i1 %cc, label %if, label %else
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+
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+if:
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+ store volatile <4 x float> %dtex, <4 x float>* undef
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+ unreachable
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+
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+else:
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+ ret <4 x float> %dtex
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+}
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declare void @llvm.amdgcn.image.store.v4i32(<4 x float>, <4 x i32>, <8 x i32>, i32, i1, i1, i1, i1) #1
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declare void @llvm.amdgcn.buffer.store.f32(float, <4 x i32>, i32, i32, i1, i1) #1
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@ -1,7 +1,7 @@
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# Template file for 'llvm'
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pkgname=llvm
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version=3.9.1
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revision=1
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revision=2
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wrksrc="llvm-${version}.src"
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lib32disabled=yes
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build_style=cmake
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@ -54,6 +54,9 @@ post_extract() {
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patch -sNp1 -i ${i}
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done
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# https://bugs.freedesktop.org/show_bug.cgi?id=99078
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patch -RsNp1 -i ${FILESDIR}/patches/llvm/reverse-llvm-AMDGPU-Fix-an-interaction-between-WQM-and-polygon-stippling.patch
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cd ${XBPS_BUILDDIR}/compiler-rt-${version}.src
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for i in ${FILESDIR}/patches/compiler-rt/compiler-rt-*.patch; do
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msg_normal "Applying $i to compiler-rt\n"
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