From f38a3ea85adb2dc402874fbe3384b8b059d9c9ba Mon Sep 17 00:00:00 2001 From: Juan RP Date: Tue, 20 Aug 2013 14:50:35 +0200 Subject: [PATCH] netcat: added patch for ARM and probably other archs. --- .../netcat-0.7.1-signed-bit-counting.patch | 28 +++++++++++++++++++ srcpkgs/netcat/template | 2 +- 2 files changed, 29 insertions(+), 1 deletion(-) create mode 100644 srcpkgs/netcat/patches/netcat-0.7.1-signed-bit-counting.patch diff --git a/srcpkgs/netcat/patches/netcat-0.7.1-signed-bit-counting.patch b/srcpkgs/netcat/patches/netcat-0.7.1-signed-bit-counting.patch new file mode 100644 index 0000000000..5e86aa92d2 --- /dev/null +++ b/srcpkgs/netcat/patches/netcat-0.7.1-signed-bit-counting.patch @@ -0,0 +1,28 @@ +# Fix the endian-specific bit-counting code so that it works. +# SF:1068324 "netcat_flag_count() fix" +# http://sourceforge.net/tracker/?func=detail&aid=1205729&group_id=52204&atid=466046 +# SF:1205729 "doen't work on arm linux platform": +# http://sourceforge.net/tracker/?func=detail&aid=1068324&group_id=52204&atid=466046 + +--- src/flagset.c 2010-07-19 13:51:46.000000000 +0100 ++++ src/flagset.c 2010-07-19 13:52:27.000000000 +0100 +@@ -134,7 +134,7 @@ + + int netcat_flag_count(void) + { +- register char c; ++ register unsigned char c; + register int i; + int ret = 0; + +@@ -154,8 +154,8 @@ + Assumed that the bit number 1 is the sign, and that we will shift the + bit 1 (or the bit that takes its place later) until the the most right, + WHY it has to keep the wrong sign? */ +- ret -= (c >> 7); +- c <<= 1; ++ ret += c&1; ++ c>>=1; + } + } + diff --git a/srcpkgs/netcat/template b/srcpkgs/netcat/template index 09d19ffb05..b40dfc8a3f 100644 --- a/srcpkgs/netcat/template +++ b/srcpkgs/netcat/template @@ -1,7 +1,7 @@ # Template file for 'netcat' pkgname=netcat version=0.7.1 -revision=1 +revision=2 build_style=gnu-configure short_desc="The GNU netcat" maintainer="Juan RP "